EDA News Monday January 12, 2004 From: EDACafe ÿÿ Previous Issues _____ Cadence _____ About This Issue Si2 and OCP-IP An exercise in comparing and contrasting _____ January 5 - 9, 2004 By Peggy Aycinena Read business product alliance news and analysis of weekly happenings _____ The following exchange took place during a conference call on December 8th. Participants included Ian Mackintosh, President of OCP-IP (speaking from San Jose, California) and Steve Schulz, President and CEO of Si2 (speaking from Austin, Texas). The point of the conversation - facilitated by Joe Basquez of Vitalcom PR - was to help clarify the distinctions between the two organizations. Q: Which came first - Si2 (Silicon Integration Initiative) or OCP-IP (Open Core Protocol International Partnership)? Ian: Si2 has been around for a long time. OCP-IP is just celebrating our 2-year anniversary. Steve: Si2 has been around as an organization for 15 years now. It was formed by the large IDM semiconductor companies who were driving for interoperability for the design tools. CFI, the CAD Framework Initiative, was the ancestor of Si2. Then about 7 or 8 years ago, the organization, with the Board and its membership, refocused - not to change their mission, but to change how to achieve their mission. The organization was renamed at that time. Q: Where are the offices located geographically? Ian: We're legally incorporated in Mountain View, California. But our operations offices are in Portland, Oregon. Actually, we're a true virtual organization. You may be aware of the infrastructure - we're a trade organization, not a standards body, and all of our work is contracted out to volunteers. Steve: Si2 is in extreme contrast to the OCP-IP structure. Our offices are in Austin, Texas, where we have a physical plant, equipment, labs, permanent employees, and a dedicated staff. We leverage our expertise by way of our members, who donate resources to our projects to achieve our goals. We actually provide a fair amount of infrastructure. We were chartered with the National Cooperative Research Acts and we provide legal protection for the companies that come together through Si2. We provide legal, financial, marcom, PR, and marketing services, as well as education, and training. And of course, we have the OpenAccess website. Ian: Everything that Steve says Si2 provides - education, marketing, training, legal and financial services - OCP-IP provides as well, but it's contracted out to volunteers. Q: Are both of you full-time employees of Si2 and OCP-IP, respectively? Ian: I'm not an employee; we don't have employees. My day job is actually as a Vice President for Strategic Planning at Onyx. It's easy for me to balance both [with a chuckle], 90% of my time is spent on OCP-IP, as a Board Member at VSIA, and as a chair of the IP Protection Working Group. Steve: I'm a full-time employee of Si2. Q: What is the charter of each body in 25 words or less? Ian: OCP-IP supports and enhances the market for the sockets for block-based SoC design. Steve: Si2 is about providing the infrastructure to enable the integration and interoperability of the IC design flow. Q: Give me a quick way to remember what's distinctive about OCP-IP versus Si2. Ian: The name Open Core Protocol was a proprietary standard such as USB and InfiniBand, which became the basis for the organization as parts of the protocol were donated. Originally it was called OCP, but the IP [that's now in the name] stands for International Partnership. Steve: It's about integration and interoperability - the Si2 charter summarizes it. We've got a number of projects, which are focused on infrastructure. Think of the kind of standardization that Si2 is focusing on as the design content. OCP-IP provides the infrastructure and flow that allows the content to flow through it. Q: Who are the main constituents of the two organizations? Steve: For Si2, it's the large semiconductor companies, the traditional IDMs, and the large EDA companies, that have been our traditional focus. As we expand with newer projects, we're expanding down the flow into mask makers and equipment makers. This week, in fact, we're formally kicking off a new coalition. I'll actually know in about 45 minutes who's in and who's out. It obviously takes patience and time to develop new relationships, and we feel confident that we're addressing the areas of high interest to our constituents. Ian: OCP-IP is really comprised of users and developers of IP and EDA providers, as well as most of the SoC design market. We're really appealing to the SoC design market. There are lots of people today working on the flow, and we're focusing on a limited number of those people. Q: What does it cost a company to become a member, remain a member? Steve: Si2 has a multi-tiered revenue structure. Si2 membership can cost anything from $1,500 to $20,000. Membership in any particular project is above and beyond that. An OpenAccess director-level membership is $60,000, while it's $5,000 for a lower-level membership. We also offer academic memberships for $50 a year, as well as special pricing for independent consultants. Ian: It's $10,000 for a basic community membership in OCP-IP, and $25,000 to participate in a Working Group. Then there's a $1,000 membership for universities and small companies with less than $7 million in revenue. Q: How do you let members know about developments? Do you publish a newsletter, or send e-mail, or provide regular updates to you websites? Ian: Yes, OCP-IPO provides all of that, plus we offer conference attendance, paper submissions, trade shows, press releases, and our website is very active. The average user time spent on our site is over 60 minutes per visit. And, we have several thousand visitors per month. Steve: We have 2 websites - the Si2 site, plus a separate website and community portal for access to documentation at www.OpenEDA.org . And, we also offer everything that you mentioned, plus we host our own seminars, workshops, conferences, with one that's of particular importance - the OpenAccess Developer's Forum. We're about to do our 4th annual OpenAccess Forum. At this point, we know that the downloading of the OpenAccess code has been done by 800 different organizations, and an excess of 30,000 individuals. Q: Why are VSIA and Accellera more like 'household' names, while OCP-IP and Si2 seem to be somewhat less well known? Ian: Well, we're actually very young, but frankly we're also pretty prominent. We've become more visible at conferences and we've been taking a more prominent role in industry events. We've also initiated on-line webcasts. In fact, about a year ago, people stopped asking who we are and started asking instead if they could have our materials. Steve: I actually used to be on the Board of Accellera. Their conversations tend to be about language, and the controversy and discussions about that. [Meanwhile], there's a high barrier to entry to Si2 and people must make a large commitment to join. Right now, we have 35 companies - they all know what they're doing and what they're getting out of membership in Si2. We run the organization like a business, with a business plan and deliverables. It's an under-the-radar approach at times because we don't have the controversy, but our members are a very stable group who know what they want. We're not a paper specification factory. Instead, we've got a complicated architecture with millions of lines of code. So, ours is a fairly complicated environment with less surface-level controversy. Q: Is there a competition between the various organizations for volunteers and man hours? Ian: Because of the other groups I'm involved in, I know that some companies won't participate in more than a finite number of things. But everything that we work on in OCP-IP is extremely germane to the needs of the membership. Our members put in the time because they want the results. Although, we do sometimes see a lack of participation because of limited bandwidth from our members. Steve: I'm not aware of any situation where we've come up against a competition. There is no other group that is focused on the infrastructure or the technology that we're involved in. Our members know in advance about the commitment required and the benefits. We obviously could always use more participation from new members, and we're including some new incentives in 2004, but none of it is from a competitive standpoint. Q: How do Si2 and OCP-IP deal with international standards/interests? Ian: Most standards bodies are, by their nature, international - not North American. We're associated with many groups who are part of the international [landscape]. We've got ongoing collaborations with STARC - the Japanese consortium - and OSCI, Si2, VSIA, VCX, and D&R. We collaborate with all of those guys and most of those guys are members of OCP-IP, as well. We're very involved in the international community - where we need to be engaged with people, we are. I like to tell folks what those various groups do through our newsletter, and we like to feature them as members in our newsletter. Steve: We've always been very international. Probably 60 percent of our members are in North America, but we have fairly large contributions from companies in other countries. We have a lot of deep collaboration with other consortia and standards bodies. Right at the moment, we're working with STARC and ASPLA and JEITA in a joint effort where they would have local Working Groups working with Si2. They have local discussions in their own language, and then have discussions and language translations and coordination with other time zones. For the first time, in fact, we've going to ASP-DAC and we've had a presence and hosted workshops at DATE - this will be our second year. We also host interoperability workshops at DAC. Ian: Actually, this is all pretty common for trade organizations. Also, we have many academic members from all over the world. Q: When are de facto standards better driven by the marketplace rather than by standards bodies? Steve: You mention market forces, but really, many standards can't take root within a single vendor. De facto standards arise when it's a mature technology that has been popularized from one vendor or another, but you need to have a critical level of support just to get it to a viable level. The things that Si2 deals with are complex and difficult. Things that are required by IC designers, EDA vendors, photo mask makers, fab equip suppliers, not to mention sub-industries like the FSA, etc. The kind of coordination needed to get agreement so that things can become a standard, requires large groups coming together with a vision. And, as you always have the question of the creation and evolution of something, Si2 is very much based on community control and a shared evolution. The members are owners and stakeholders, so you don't have the distraction of outside forces. Ian: There are really two types of needs. If something is evolving which is new and needs a quick infrastructure, it's a marketplace kind of issue. There are standards bodies that are for a more mature selection of things that are as they already are, things that aren't really going to change - virtual groups and trade organizations are for creating infrastructure. Then there are standards bodies that publish established standards and selected shorts. Steve: Si2 is neither a trade organization, nor are we an officially accredited standards organization like the IEEE or ISO. We are a consortium of companies that believe in a certain vision of interoperability - a group that's large, but that comes together. Standards are a means to an end, but they're not a standard in themselves. Adoption is critical for success, and having something stamped as a standard is a useful part of the effort, but the process may not be the same as that which stakeholders require for their business needs. Ian: If it's a simple standard, it's better served in a trade organization. And, late-market standards can go through traditional standards bodies. But, it's a matter of where you are in your standards. These late-market standard bodies work around control and agility, where as we're heavily into building infrastructure and support. Steve: We take a very holistic approach to the process, because of the odds of success in the adoption of a standard. Si2 invests a lot in a lot of other things that help to complement the creation of an ecosystem for the support that's necessary for that adoption. Editor's Note: (Read the following carefully, as you will be tested later. Failure to pass the exam may be punishable by a sentence of up to one year of active committee involvement in each and every organization on these two lists.) The following organizations have direct affiliations, or talk routinely, with OCP-IP. VSIA (Virtual Socket Interface Alliance) Si2 (Silicon Integration Initiative) SPIRIT (Structure for Packaging, Integrating and Re-using IP within Tool flows) STARC (Semiconductor Technology Academic Research Center) OSCI (Open SystemC Initiative) VCX (Virtual Component Exchange) D&R (Design & Reuse) FSA (Fabless Semiconductor Association) ECSI (European Electronic Chips & Systems design Initiative) The following consortia and standards organizations interact with and/or cross-support Si2. Accellera RosettaNet SRC (Semiconductor Research Corp.) IEEE (Institute of Electrical and Electronics Engineers, Inc.) VSIA (Virtual Socket Interface Association) OCP-IP (Open Core Protocol International Partnership) STARC (Semiconductor Technology Academic Research Center) ASPLA (Advanced SoC Platform Corp.) JEITA (Japan Electronics and Information Technology Industries Association) Selete (Semiconductor Leading Edge Technology, Inc.) AIST (Nara Institute of Science and Technology) ECSI (European Electronic Chips & Systems design Initiative) edacentrum (Electronic Design Automation centrum) Industry News - Tools and IP Agilent Technologies Inc. says it has introduced Verilog-A support in its RF Design Environment (RFDE) 2003C and Advanced Design System (ADS) 2003C EDA tools. The company says that Verilog-A support will permit RFIC and MMIC designers to use Agilent's EDA tools to more easily develop accurate analog behavioral and compact device models that simulate at speeds comparable to built-in C-based models. Note that Verilog-A is a "high-level, industry-standard modeling language used by analog, RF, microwave and mixed-signal system designers to create behavioral and device models. These models are used for verification of RFIC and MMIC designs for products such as cellular phones, pagers, wireless and broadband networks, and radar and satellite communications systems. Traditionally, these models are implemented by the EDA vendor or end-users using proprietary interfaces for each simulator. Verilog-A-based models, unlike most C-based or proprietary models, are immediately accessible by many designers, regardless of the simulation technology they are using." Meanwhile, Agilent says its Verilog-A software is based on new compiler technology developed by Tiburon Design Automation. Applied Wave Research, Inc. (AWR) and Cyntec Co., Ltd. (based in Hsin-Chu, Taiwan) have announced that they will work together to develop a thin film process design library for AWR's Microwave Office EDA software suite. The news should be ingested in 3 parts. Part 1 - from the Press Release regarding thin film technology: "Thin film circuits printed on low-loss ceramic substrates is a mature technology that has been used for several decades in millimeter wave and radio-frequency (RF) applications. Similar to semiconductor manufacturing, not only via holes and bonding pads, but resistor, inductor, capacitor, and isolation layers can be easily formed during the deposition and etching process. Recent advances in multi-layer substrate design have enabled the fabrication of much more complex circuits, which are needed for today's sophisticated communications systems. Thin film technology is a low-cost solution that produces stable, high-performance, miniature products capable of meeting current and future demands." Part 2 - from the Press Release regarding various entities in Taiwan: "AWR has been working closely on several projects with Taiwan's Industrial Technology Research Institute (ITRI), a non-profit R&D organization founded by the Ministry of Economic Affairs (MOEA), to address the technological needs of Taiwan's industrial development. ITRI has been appointed and is funded by the government's Industrial Development Bureau (IDB) to develop thin film technology in Taiwan. This involves foundries, EDA vendors, test equipment vendors, and potential customers. AWR will provide training and mentorship for Cyntec to develop a thin film process library for the Microwave Office product." Part 3 - the Press Release includes a quote from a certain Mr. Fuh, Committee of Communication Industry Development, MOEA: "We see the development of thin film technology as an important step towards our goal to make Taiwan the global leading IC design center. We expect that this cooperative effort between AWR and Cyntec will produce a design tool that brings us closer to making thin film technology a viable alternative to traditional IC design and production." Also from AWR - The company announced that it has finalized an agreement with the Australia Telescope National Facility (ATNF) Engineering Development Group to provide EDA "solutions" to be used for radio-frequency (RF), microwave, and millimeter-wave design. ATNF will use AWR's Microwave Office software for designing state-of-the-art cryogenically cooled receivers and associated components. Per the Press Release: "The ATNF Engineering Development Group, led by Dr. Warwick Wilson, has a staff of approximately 25 engineers and technicians and is responsible for the design and construction of essentially all ATNF front-end receiver systems. The front ends of these receivers are cooled by closed-cycle liquid helium refrigeration to minimise thermal noise. The group has expertise in the areas of passive microwave devices, high electron mobility transistor (HEMT) low noise amplifiers (LNAs), cryogenics, RF, and input frequency (IF) systems. Recently much of its development effort has been focused on the design of broadband indium phosphide (InP) microwave monolithic integrated circuits (MMICs) for cryogenic (approximately -250 øC) operation at frequencies over 100GHz." Cadence Design Systems, Inc. announced that Cypress Semiconductor Corp. has adopted the latest version of Cadence's Fire & Ice QXC as the sign off cell-based extractor in its 130-nanometer and 90-nanometer production flows. Cadence says enhancements included in the latest version are intended to help designers "reduce timing margins and achieve first silicon success." Paul Keswick, Senior Vice President of Cypress's New Product Development group, is quoted in the Press Release: "We have found the latest release of Fire & Ice QXC to be extremely effective. It delivers the accuracy we need to confidently address the optical and copper effects that have become serious design issues in our 130-nanometer and 90-nanometer flows. We are currently using Fire & Ice QXC in the design of some very advanced chips, including the Ayama family of network search engines." ZAiQ Technologies, Inc. and Emulation and Verification Engineering (EVE) announced that ZAiQ's SYSTEMware and EVE's ZeBu have been integrated to produce a transaction-based verification platform. The companies say that the integrated tool accelerates verification by up to five orders of magnitude over pure logic simulators. Per the Press Release: "For example, on a network processor SoC containing 550,000 ASIC gates, plus 2.5-million bits of RAM, ZeBu/ZAiQ achieved up to 100,000 times speedup. Most tests were in the range of 1,000 to 10,000 times. In general, acceleration varies with the type and size of the design and test suite." Rich McAndrew, Executive Vice President and General Manager of ZAiQ's SYSTEMware Products Group, is also quoted: "Combining SCE-API transaction-based verification with state-of-the-art hardware-assisted functional verification offers designers an extraordinary price/performance ratio. The EVE team has delivered a compelling board-level solution for hardware debugging, hardware-software co-verification, and embedded software development. ZAiQ's SYSTEMware and synthesizable standards-based verification IP and EVE's ZeBu provides designers with a cost-effective alternative for high-performance verification." Meanwhile, ZAiQ and EVE also announced that the two companies have entered into a value-added reseller agreement that allows EVE customers to order the integrated ZeBu and SYSTEMware products directly from EVE, and to use off-the-self standard transactors from ZAiQ's SYSTEMware library of SVCs. Newsmakers Cadence Design Systems, Inc. announced it has completed the acquisition of Q Design Automation, Inc. (QDA), a privately held company. The terms of the acquisition were not disclosed. QDA's migration and creation products include Qtrek-Migrate for the migration of existing designs to new or altered process technologies and Qtrek-Create for layout optimization and design rule enforcement. Cadence says it will begin offering QDA's technology in Q1 2004 as part of its Virtuoso layout design platform. Lavi Lev, Executive Vice President and General Manager of the Implementation Division at Cadence is quoted in the Press Release: "QDA's technologies complement our existing VLE and VXL layout products and meet our criteria for providing custom designers with world-class, productivity-enhancing capabilities. Customers we've surveyed rate Qtrek-Migrate higher than competing solutions in critical productivity areas of ease of use and hierarchy preservation." David Marple, CEO of QDA, is also quoted: "The acquisition gives QDA excellent access to the custom layout market and ensures even tighter integration with the Virtuoso platform, which is the platform of choice for the majority of layout designers." Also from Cadence - The company announced it has appointed Ping Chao to head the Design and Verification Division. Chao joined the company in 2001 when Cadence acquired Silicon Perspective Corp., a company that he founded and served as President and CEO. All told, he has founded and served in executive roles in three different EDA start-ups, taking each through an IPO or an acquisition. He is also a co-founder of Cadence and, not surprisingly therefore, has an extensive career in the EDA industry and electronic design. Chao has a BSEE from National Chiao-Tung University in Taiwan and a MSEE/CS degree from U.C. Berkeley. Giga Scale IC (Giga Scale Integration Corp.) has named Arklin Kee as Vice President of Sales and Business Development. Kee will report to Vin Ratford, President of Giga Scale IC, who joined in December 2003. Ratford is quoted in the Press Release: "Arklin is a valuable addition to Giga Scale IC's management team. His drive, understanding of the semiconductor market, and courageous selling style are a perfect complement to our needs." The company says that Kee is experienced in both domestic and international sales, business development, and technical project management. Previously, he was with InTime Software. Prior to InTime, he worked for Cadence Design Systems in an executive role, and similarly at High Level Design Systems, now part of Cadence. Kee started out as a technical associate at Bell Telephone Laboratories. He has a BSEE from Pratt Institute in Brooklyn, NY, and is a graduate of Santa Clara University's Management Development Program. Magma Design Automation Inc. announced the launch of its "IC Excellence" initiative in India. The company says the program aims at training existing designers on the technology needed to meet current market requirements, to help designers focus on product innovation by automating IC implementation, and to embed the "latest" technology in Indian universities' engineering curricula. The company also says the program will accelerate India's adoption of advanced technology, enable the region to gain a competitive edge, and benefit Magma by creating closer relationships with local customers and building a local talent pool. Magma says it will donate IC design software to various engineering institutions, will provide training materials, applications engineering support, will donate licenses, will launch an IC Physical Design PG Diploma course with VLSI training institutions in India, will collaborate with various corporations, and will partner with the government of Karnataka and the Department of IT of the government of India to meet shared objectives. IIT-Madras, IIT-Kharagpur, BITS-Pilani, BEC, MAHE and Amrita Institute say they have already adopted Magma for their respective Btech, Mtech, and Ph.D. programs. Rajeev Madhavan, CEO of Magma, is quoted in the Press Release: "The IC market worldwide is expected to grow at 12 percent, and the Asia-Pacific region is seeing even higher growth. Catalyzed by private and governmental efforts, this region is spawning local products and services companies, in addition to the many multinational corporations that have based their design centers here. Just as the level of software training has grown in India, an increase in the IC design pool will help India establish itself as an ideal destination for IC design activities." Sequence Design announced it has been awarded two U.S. Patents for RTL power analysis and extraction of mutual inductance parasitics. U.S. Patent No. 6,598,209 is entitled, "RTL Power Analysis Using Gate-Level Cell Power Models," and permits users to accurately estimate power at the RTL level using standard gate-level libraries. U.S. Patent No. 6,643,831 is entitled, "Method And System For Extraction Of Parasitic Interconnect Impedance Including Inductance," and describes a method by which parasitic impedances, including inductance, may be extracted for an IC to allow more accurate modeling and timing analysis. The patent's co-authors are K.J. Chang, formerly of Sequence and now a professor with Taiwan's National Tsing Hua University, Li-Fu Chang and Rob Mathews of Sequence, and Martin Walker, founder of Frequency Technology. Bits & Bytes 1 - Semiconductors on the move George Scalise, President of the Semiconductor Industry Association, as quoted in this last week's SIA Press Release: "November has been another exceptionally strong month for the industry with the year-on-year growth accelerating to 25.7%, indicating that 2003's second half performance is one of the strongest on record for our industry. Year-to-date sales through November are 17.4% ahead of 2002. We expect sales for all of 2003 to exceed the current forecast of 15.8% with broad-based strength in all end-markets, especially computation, communications, global consumer and automotive." 2 - Verisity acquires Axis Systems Remember late last year when the news that Verisity Design, Inc. had acquired Axis Systems, Inc. hit the wires? Well, it's January now and here's your chance to listen as Versitiy's CEO Moshe Gavrielov and Axis Systems' President and CEO Mike Tsai comment briefly on the news. I spoke with them by phone on Thursday, January 8th. Moshe: It has been a few weeks since the announcement and obviously we've had the holidays in the meantime. However, we're continuing to get extraordinarily positive response from both of our teams, the employees of both companies, and our customers. The thing driving the response is that the next technology horizon is definitely front-end verification. There is both the room and the need for the kind of technology that Axis and Verisity bring to the market. We're very encouraged by the feedback and we're looking forward to the actual execution of the merger of the two companies. We'll be co-locating the new company headquarters in a space more or less in the middle of where the two companies are now located, which means we'll probably be somewhere on the border between Sunnyvale and Mountain View, California. Mike: I think our companies and our customers are excited about the news and our combined vision. We want to be the Number 1 company in verification. Both of our companies have had that as our goal from the very beginning. Now with the merger, our customers are recognizing that the combined force of the two companies means that verification will be served in all areas, including in the platform area. Do our technologies overlap? Actually, it's quite amazing. Even before this merger, Axis had been working closely with Verisity because our technologies are totally complementary to each other. Our customer bases overlap, but not our technologies. Moshe: Is this a merger or an acquisition? Well actually, in legal terms it will be an acquisition and I'll continue to be CEO of Verisity. Mike: My role will be as General Manager of the Platform Division of Verisity. Moshe: Mike will be handling the Hardware Platform Division which, relatively speaking, will consist of Axis Systems. The Verisity part of the combined companies, however, will continue to operate unchanged. The Marketing, Sales VPs, and so on from Verisity will remain unchanged. What do I think are the prospects for the verification niche in EDA? We all think that verification in the front end is totally underestimated, both in the size of the problem and in the opportunities. In fact, I even object to the word "niche," because it's clearly the largest growth area in EDA. It's where most customers spend their time today and it's where they'll spend the most money in the future. Years ago - say, if you go back 20 years - synthesis was only a "niche," but that niche became a $200 million to $300 million industry. Now, verification promises to be 5 times as large as synthesis. Engineers today are spending 60-to-80 percent of their time on verification. The number of design starts may be going down, but the complexity of those designs is going up. I definitely think Synopsys and Cadence are fine companies with broad offerings - which is where they're strength is - but their strength is not in the quality of the solutions they provide. We've actually had an opportunity to work with all 3 of the larger vendors lately - Synopsys, Cadence, and Mentor - and we still strongly believe that the combination of Axis and Verisity will put us second to none. You ask when I think Synopsys or Cadence might offer to buy the combined Verisity-Axis Systems entity? Well, I would answer that, maybe someday in the future, you'll pose that question again, but you'll be asking when we are going to offer to buy Synopsys or Cadence. After all, bravado never hurts! In the category of ... Letters to the Editor - December 22nd - EDA Unplugged 2003 Letter No. 1 "This is really great!" Letter No. 2 "Aart de Guess' words made me well up!" Letter No. 3 "The December 22nd issue is a very interesting and enlightening one. It seems that most people are propagating similar values. Children definitely learn more from the actions of people around them. I'm an optimist and do hope we'll live to see a better tomorrow. I also agree with what your mom says - nothing will happen if we don't do anything." Letter No. 4 "Although I thoroughly enjoyed the 'Teach your children well' article, and many of the CEOs and respondents seem to teach their children solid and honorable values, it struck me that only two out of 49 (Mike Tsai and Steven Schulz) brought integrity to the forefront! With the scandals we have seen in the past year, one would expect a little more emphasis on that one. What's in a name, you might ask? Just about everything you do! A name is made up of little promises kept to the letter. It is made up of faithfulness, loyalty, and honesty, and of efficiency in your work. In short, a name is the blueprint of the thing called character." --Peggy Aycinena is a Contributing Editor and can be reached by clicking here . You are registered as: [dolinsky@gsu.by]. CafeNews is a service for EDA professionals. EDACafe respects your online time and Internet privacy. To change your newsletter's details, including format and frequency, or to discontinue this service, please navigate to . If you have questions about EDACafe services, please send email to edaadmin@ibsystems.com . Copyright c 2004, Internet Business Systems, Inc. - 11208 Shelter Cove, Smithfield, VA 23420 - 888-44-WEB-44 - All rights reserved.